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Cream of the Crop 1
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Cream of the Crop 1.iso
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UUPC11QS.ARJ
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DEFCHR.H
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1989-09-26
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8KB
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157 lines
/* */
/* DEFCHR - Definitions for the character devices (CON, AUX, and PRN) */
/* */
/* Define functions of BIOS_CONFUNC, BIOS_PRNFUNC, and BIOS_AUXFUNC */
#define CHR_WRITE 0x00 /* Write function */
#define CHR_READ CHR_WRITE+1 /* Read function */
#define CHR_STATUS CHR_READ+1 /* Status function */
#define CHR_SFGS 0x00 /* Get status subfunction */
#define CHRS_WA 0x01 /* <ETX> sent, waiting for <ACK> */
#define CHRS_WD 0x02 /* <DC3> seen, waiting for <DC1> */
#define CHRS_SN 0x04 /* Sending nulls */
#define CHRS_TXR 0x80 /* Transmitter ready to send data */
#define CHRS_RXR 0x40 /* Receiver has data */
#define CHRS_RXOF 0x20 /* Receiver queue overflow */
#define CHRS_RXE 0x10 /* Other type of reciver error */
#define CHRS_TXE 0x08 /* Transmitter error */
#define CHR_SFGC CHR_SFGS+1 /* Get configuration info subfunction */
#define CHR_CONTROL CHR_STATUS+1 /* Control function */
#define CHR_CFSU 0x00 /* Setup new configuration parms subfunction */
#define CHR_CFCI CHR_CFSU+1 /* Clear input subfunction */
#define CHR_CFCO CHR_CFCI+1 /* Clear output subfunction */
#define CHR_LOOK CHR_CONTROL+1 /* Nondestructive read function */
#define CHR_FMAX CHR_LOOK /* Maximum function number */
/* Configuration information packet */
#define CHRD_CLASS 0x00 /* Device class */
#define CHRDCL_CRT 0x00 /* Internal keyboard/display */
#define CHRDCL_SER CHRDCL_CRT+1 /* 2661 serial port */
#define CHRDCL_PAR CHRDCL_SER+1 /* PIA parallel port */
#define CHRDCL_MAX CHRDCL_PAR /* Maximum class value */
#define CHRD_ATTR CHRD_CLASS+1 /* Attributes */
#define CHRDA_SPI 0x01 /* Strip parity on input */
#define CHRDA_SPO 0x02 /* Strip parity on output */
#define CHRDA_MLI 0x04 /* Map lower to upper case on input */
#define CHRDA_MLO 0x08 /* Map lower to upper case on output */
/* The remaining fields are used only with the 2661 serial ports */
/* (except CHRD_NCHR and CHRD_NCNT which can be used by para printer) */
#define CHRD_PORT CHRD_ATTR+1 /* Port number */
#define CHRD_BAUD CHRD_PORT+2 /* Baud rate */
#define BD455 0x00 /* 45.5 */
#define BD050 0x01 /* 50 */
#define BD075 0x02 /* 75 */
#define BD110 3 /* 110 */
#define BD134 0x04 /* 134.5 */
#define BD150 0x05 /* 150 */
#define BD300 6 /* 300 */
#define BD600 7 /* 600 */
#define BD120 0x08 /* 1200 */
#define BD180 9 /* 1800 */
#define BD200 10 /* 2000 */
#define BD240 11 /* 2400 */
#define BD480 12 /* 4800 */
#define BD960 13 /* 9600 */
#define BD192 14 /* 19200 */
#define BD384 15 /* 38400 */
#define BDMAX BD384 /* Maximum valid baud rate */
#define CHRD_HSHK CHRD_BAUD+1 /* Handshaking protocol */
#define CHRDH_NO 0x00 /* None */
#define CHRDH_EAH CHRDH_NO+1 /* <ETX>/<ACK> */
#define CHRDH_DCH CHRDH_EAH+1 /* <DC3>/<DC1> (CTRL-S/CTRL-Q) */
#define CHRDH_DCDH CHRDH_DCH+1 /* DCD(data carrier detect) high */
#define CHRDH_DCDL CHRDH_DCDH+1 /* DCD low */
#define CHRDH_DSRH CHRDH_DCDL+1 /* DSR(data set ready) high */
#define CHRDH_DSRL CHRDH_DSRH+1 /* DSR low */
#define CHRDH_MAX CHRDH_DSRL /* Maximum valid value */
#define CHRD_BCTL CHRD_HSHK+1 /* Stop bits/parity/char length */
/* (2661 Mode register 1) */
#define CHRDB_SB 0xC0 /* Stop bits */
#define CHRDB_SB1 0x40 /* 1 stop bit */
#define CHRDB_SB15 0x80 /* 1.5 stop bits */
#define CHRDB_SB2 0xC0 /* 2 stop bits */
#define CHRDB_PT 0x20 /* Parity type(0=odd, 1=even) */
#define CHRDB_PC 0x10 /* Parity contr(0=disabled, 1=enabled) */
#define CHRDB_CL 0x0C /* Character length */
#define CHRDB_CL5 0x00 /* 5 bits */
#define CHRDB_CL6 0x04 /* 6 bits */
#define CHRDB_CL7 0x08 /* 7 bits */
#define CHRDB_CL8 0x0C /* 8 bits */
#define CHRD_ECNT CHRD_BCTL+1 /* If <ETX>/<ACK> used, chars to */
/* send before <ETX> sent */
#define CHRD_NCNT CHRD_ECNT+1 /* Number of NULLs to send after */
/* CHRD_NCHR seen */
#define CHRD_NCHR CHRD_NCNT+1 /* Character after which to send NULLs */
#define CHRD_RES CHRD_NCHR+1 /* Reserved for future use */
#define CHRD_SIZE CHRD_RES+6 /* Size of a CHRD */
/* Error codes that are returned */
#define CHRE_ILGFH 0x00 /* Illegal function code in AH */
#define CHRE_ILGFL CHRE_ILGFH+1 /* Illegal function code in AL */
#define CHRE_NWR CHRE_ILGFL+1 /* No writes allowed to device */
#define CHRE_NRD CHRE_NWR+1 /* No reads allowed to device */
#define CHRE_BSUP CHRE_NRD+1 /* Bad set up parameters */
#define CHRE_WRB CHRE_BSUP+1 /* Device busy on write */
#define CHRE_RDNR CHRE_WRB+1 /* Device not ready on read */
#define CHRE_HTO CHRE_RDNR+1 /* Software handshake time out */
#define CHRE_ILR CHRE_HTO+1 /* Illegal responce from device */
#define CHRE_IQE CHRE_ILR+1 /* Input queue empty */
#define CHRE_NIQ CHRE_IQE+1 /* Device has no input queue */
/* Internal character device control table(It includes an embedded CHRD) */
#define CID_CHRD 0x00 /* A CHRD */
#define CID_CLASS CID_CHRD+CHRD_SIZE /* Class of character device */
/* (must be mult of 2) */
#define CIDCL_CRT CHRDCL_CRT*2 /* Internal video/keyboard */
#define CIDCL_SER CHRDCL_SER*2 /* 2661 serial port */
#define CIDCL_PAR CHRDCL_PAR*2 /* PIA parallel port */
#define CID_TYPE CID_CLASS+2 /* Special types */
#define CIDTY_NORM 0x00 /* Normal type */
#define CIDTY_CSP CIDTY_NORM+1 /* Special CRT */
#define CID_IPORT CID_TYPE+2 /* Input port */
#define CID_OPORT CID_IPORT+2 /* Output port */
#define CID_SPORT CID_OPORT+2 /* Status port */
#define CID_CPORT CID_SPORT+2 /* Control port */
#define CID_ST CID_CPORT+2 /* Status(see CHRD_SFGS for values) */
#define CID_IRM CID_ST+1 /* Input ready mask */
#define CID_IPM CID_IRM+1 /* Input polarity mask */
#define CID_ORM CID_IPM+1 /* Output ready mask */
#define CID_OPM CID_ORM+1 /* Output polarity mask */
#define CID_ECTR CID_OPM+1 /* Char counter for sending <ETX> */
#define CID_NCTR CID_ECTR+1 /* Null down counter */
#define CID_SIZE CID_NCTR+1 /* Size of the a CID */
/* */
/* Define queue for character devices */
/* */
#define CQ_SADDR 0x00 /* Addr of start of queue */
#define CQ_EADDR CQ_SADDR+2 /* Addr of end of queue */
#define CQ_QSIZE CQ_EADDR+2 /* Size of queue */
#define CQ_ELMTS CQ_QSIZE+2 /* Number of elements currently in queue */
#define CQ_STATUS CQ_ELMTS+2 /* Status (as defined under CHR_STATUS) */
#define CQ_FRONT CQ_STATUS+1 /* Addr of first element in queue */
#define CQ_REAR CQ_FRONT+2 /* Addr of last element in queue */
#define CQ_SEGM CQ_REAR+2 /* Segment of que */
#define CQ_SIZE CQ_SEGM+2 /* Size of a CQ */
/* queue sizes */
#define ZSERA_IQS 255 /* Serial A input que */
#define ZSERA_OQS 255 /* Serial A output que */
#define ZSERB_IQS 255 /* Serial B input que */
#define ZSERB_OQS 255 /* Serial B output que */
#define ZCON_IQS 90 /* Input que size */
#define ZCON_IQS1 ZCON_IQS-10 /* Actual que size */